29 #define SDB_ID_IPMREG 0x893CD4AF
30 #define SDB_ID_IPMTXR 0xD9651827
32 #define IPM_UDP_PORT_SVR_MASK 0xFFFF0000
33 #define IPM_UDP_PORT_SVR_SHIFT 16
34 #define IPM_UDP_PORT_MOD_MASK 0x0000FFFF
35 #define IPM_UDP_PORT_MOD_SHIFT 0
37 #define IPM_PKT_BUF_REGS ( 9014 / 2 )
39 #define IPM_ACSR_TX_REQ BIT(0)
40 #define IPM_ACSR_TX_GRANT BIT(1)
42 #define IPM_CH_0 BIT(0)
43 #define IPM_CH_1 BIT(1)
44 #define IPM_CH_2 BIT(2)
45 #define IPM_CH_3 BIT(3)
46 #define IPM_CH_C BIT(4)
47 #define IPM_CH_ALL MASK(5)
48 #define IPM_CH_HW MASK(4)
50 #define IPM_ACSR_FLUSH_SHIFT 8
51 #define IPM_ACSR_FLUSH_MASK ( MASK(5) << IPM_ACSR_FLUSH_SHIFT )
52 #define IPM_ACSR_FLUSH(CH) ( ( CH << IPM_ACSR_FLUSH_SHIFT ) & IPM_ACSR_FLUSH_MASK )
54 #define IPM_ACSR_EMPTY_SHIFT 16
55 #define IPM_ACSR_EMPTY_MASK ( MASK(5) << IPM_ACSR_EMPTY_SHIFT )
56 #define IPM_ACSR_EMPTY(CH) ( ( CH << IPM_ACSR_EMPTY_SHIFT ) & IPM_ACSR_EMPTY_MASK )
58 #define IPM_ACSR_FULL_SHIFT 24
59 #define IPM_ACSR_FULL_MASK ( MASK(4) << IPM_ACSR_FULL_SHIFT )
60 #define IPM_ACSR_FULL(CH) ( ( CH << IPM_ACSR_FULL_SHIFT ) & IPM_ACSR_FULL_MASK )
62 #define IPM_FIFO_DATA_MASK 0x0000FFFF
63 #define IPM_FIFO_DATA_SHIFT 0
64 #define IPM_FIFO_EOP BIT(16)
65 #define IPM_FIFO_SOP BIT(17)
67 #define IPM_TXSTM_INFO_SEL_SHIFT 0
68 #define IPM_TXSTM_INFO_SEL_MASK ( MASK(4) << TXSTM_INFO_SEL_SHIFT )
69 #define IPM_TXSTM_INFO_SEL(CH) ( TXSTM_INFO_SEL_MASK ( CH << TXSTM_INFO_SEL_SHIFT ) )
71 #define IPM_TXSTM_INFO_PKT_AVAIL_SHIFT 8
72 #define IPM_TXSTM_INFO_PKT_AVAIL_MASK ( MASK(4) << TXSTM_INFO_PKT_AVAIL_SHIFT )
73 #define IPM_TXSTM_INFO_PKT_AVAIL(CH) ( TXSTM_INFO_PKT_AVAIL_MASK & ( CH << TXSTM_INFO_PKT_AVAIL_SHIFT ) )
75 #define IPM_TXSTM_INFO_PKT_DONE_SHIFT 12
76 #define IPM_TXSTM_INFO_PKT_DONE_MASK ( MASK(4) << IPM_TXSTM_INFO_PKT_DONE_SHIFT )
77 #define IPM_TXSTM_INFO_PKT_DONE(CH) ( IPM_TXSTM_INFO_PKT_DONE_MASK & ( CH << IPM_TXSTM_INFO_PKT_DONE_SHIFT ) )
volatile unsigned int MAC_MOD_LO
MAC source address [31:0].
volatile unsigned int MAC_SVR_LO
MAC destination address [31:0].
volatile unsigned int MAC_SVR_HI
MAC destination address [47:32].
volatile unsigned int IPMFIFO_Device
IPMux FIFO device.
volatile unsigned int IP_SVR
Destination IP address.
volatile unsigned int IP_MOD
Source IP address.
volatile unsigned int ACSR
IPMux Access control and status.
#define reg_io
Input/Output register.
volatile unsigned int MAC_MOD_HI
MAC source address [47:32].
This module contains some very basic type definitions used for hardware mappings. ...
Structure defines IPM control Device.