29 static uint32_t _muInterval;
30 static volatile uint32_t _muTicksTo;
32 static int _stmachTaskId = -1;
33 static volatile bool _runMU;
34 static volatile bool _overflowEnd;
35 static volatile bool _runOF;
36 static volatile uint32_t _tCount;
38 static void stmachTask()
43 uint32_t tdc =
STMACH->TDC_FULL_IRQ;
44 uint32_t aes =
STMACH->AES_FULL_IRQ;
48 }
else if (_overflowEnd) {
50 uint32_t tdc =
STMACH->TDC_FULL_IRQ;
51 uint32_t aes =
STMACH->AES_FULL_IRQ;
53 STMACH->TDC_FULL_IRQ = 0xFFFFFFFF;
54 STMACH->AES_FULL_IRQ = 0xFFFFFFFF;
56 STMACH->TDC_FULL_MASK = 0x0;
57 STMACH->AES_FULL_MASK = 0x0;
74 assert((((uint32_t)buf) & 0x3) == 0);
77 STMACH->MMEM_BASE = (uint32_t)buf;
78 STMACH->MMEM_WORDS = ( len + 3 ) >> 2;
81 if (_stmachTaskId == -1)
82 if (!
schdRegister(stmachTask,
true, &_stmachTaskId))
return false;
93 _muInterval = intervalMs;
100 uint32_t value = ( duration * (WISHBONE_FREQ / 100000) + 5 ) / 10;
102 if ((WISHBONE_FREQ % value) != 0)
104 if (packSize < STMACH_PL_SIZE_MIN || packSize > STMACH_PL_SIZE_MAX)
107 STMACH->PL_SIZE = packSize;
108 STMACH->TSLICE_LEN = value;
118 uint32_t csr =
STMACH->CSR;
163 if (_stmachTaskId == -1)
return;
183 uint32_t t = _tCount;
193 if (_stmachTaskId == -1)
return;
195 STMACH->AES_FULL_MASK = 0xFFFFFFFF;
196 STMACH->TDC_FULL_MASK = 0xFFFFFFFF;
uint32_t stmachEnabled()
Returns which state-machine channels are enabled.
bool stmachInit(uint32_t domId, void *monbuf, size_t monlen)
Initializes the state-machine with the DOM ID and the monitoring channel CPU data pointer...
bool stmachEnable(uint32_t enable)
Enables one or more STMACH channels.
#define IRQ_TSLICE
New timeslice.
#define STMACH_CSR_FLUSH_MASK
Channel flush mask.
static void __irqEnable()
Enabled IRQ's on a global level.
void _stmachOverflowEnd(uint32_t tdcFifo, uint32_t aesFifo)
Invoked when an AES or TDC fifo should be enabled again.
Low level routines for LM32, including interrupt handling.
bool schdRegister(SchdTaskF task, bool priority, int *taskId)
Register a task with the scheduler.
void stmachFlush(uint32_t flush, uint8_t op)
Flushes one or more state-machine channels.
void stmachMUCfg(uint32_t intervalMs)
Configure Monitor Update.
static void __irqDisable()
Disables IRQ's on a global level.
#define STMACH_CSR_MCH_BUSY
Monitoring channel busy.
Simple task scheduler for tasks.
#define STMACH_CSR_ENA_SHIFT
Channel enable shift.
#define STMACH
State Machine base pointer.
void _stmachUpdateMonitor()
Stub function invoked when it is time to update the monitor channel.
#define IRQ_HANDLER(IRQ)
Defines an IRQ handler.
uint32_t stmachTSliceCount()
Returns the number of timeslice IRQs since system start.
#define STMACH_CSR_SYNC
Indicates the state machine is syncing the enable state.
#define E_INVARGUMENT
Generic error: invalid argument.
void schdRun(int taskId)
Run a task 'now'.
void irqMaskSet(int irq, bool set)
Set/clear the interrupt mask for the specified IRQ.
static uint32_t timeOutInit(uint32_t msec)
Initializes a timeout with the specified no of msecs.
void stmachFakeFull(uint32_t mask)
Debugging stuff, don't touch!
#define STMACH_CSR_FLUSH_SHIFT
Channel flush shift.
static bool timeOut(uint32_t to)
Checks whether or not the timeout has expired.
Manages the global system error.
#define STMACH_ST_COMMIT_AES_SHIFT
AES commit mask.
void schdRunIRQ(int taskId)
Schedule a task from an IRQ.
bool stmachConfig(uint32_t packSize, uint32_t duration)
Configures the stateMachine.
void _stmachOverflowBegin(uint32_t tdcFifo, uint32_t aesFifo)
Invoked when an AES or TDC fifo overflow occurs.
This module is responsible for distributing error codes.
#define E_TIMEOUT
Generic error: Timeout error.
#define STMACH_ST_COMMIT_TDC_SHIFT
TDC commit mask.
#define LOG_DEF(NAME,...)
Define a logger for a module.
bool errSet(uint32_t code, const char *error, const char *name)
Sets an error.
#define STMACH_CSR_ENA_MASK
Channel enable mask.
#define IRQ_OVERFLOW
Overflow.
Implements a generic logger facility.
static uint32_t timeOutUpdate(uint32_t to, uint32_t msec)
Updates the original timeout with the new timeout.
void stmachGetStCommit(uint16_t *tdc, uint16_t *aes)
Debug feature: Get TDC and AES state machine Fifo commits.