21 #define _SPI_MASK_ALL 0xFFFFFFFF
24 #define _SPI_ADDR_ZERO ((uint8_t *)0xFFFFFFFF)
31 if ( ( tmp & mask ) == ( val & mask ) )
return;
32 tmp = (tmp & ~mask) | (val & mask);
36 #define SPI_FLAG( REG, BOOL, FLAG ) \
37 spiRMW( REG, ( BOOL ) ? FLAG : 0, FLAG)
42 assert(init->
mode <= 3);
46 int div = ( WISHBONE_FREQ / ( init->
bitrate * 2 )) - 1;
53 const uint16_t mode[] = {
96 if (dataIn == _SPI_ADDR_ZERO) dataIn = 0;
108 dev->
TRX[clen / 4] = t;
124 for (i = 0; i < 4; ++i) printf(
"SPI TX Reg %i: %08x\n", i, dev->
TRX[i]);
152 for (i = 0; i < 4; ++i) printf(
"SPI RX Reg %i: %08x\n", i, dev->
TRX[i]);
156 *dataOut = 0xFF & ( dev->
TRX[clen / 4] >> ((clen % 4) * 8));
164 static bool spiTxRxPart(
SPI_Device * dev, uint8_t * dataIn, uint8_t * dataOut,
int len)
166 if (dataIn == NULL && dataOut == NULL)
173 dataIn = _SPI_ADDR_ZERO;
187 if (dataOut != NULL)
spiASyncRx(dev, dataOut);
195 if (!spiTxRxPart(dev, dataIn, dataOut,
SPI_MAX_BYTES))
return false;
200 return spiTxRxPart(dev, dataIn, dataOut, len);
SPI initialization structure.
Defines the configuration of the LM32 SOC for the CLBv2.
uint8_t mode
SPI mode (0 - 3, see Wikipedia, 0 - default).
bool lsbFirst
Transfer LSB first.
void spiSelect(SPI_Device *dev, uint32_t slaveNo)
Selects a specific slave.
#define SPI_MIN_BITRATE
Minimum SPI bitrate.
Structure defines OpenCores SPI Device.
#define SPI_CTL_CHAR_LEN_MASK
Number of bits to transfer in one go MASK.
void spiASyncRx(SPI_Device *dev, uint8_t *dataOut)
Reads the data received in the previous transmission.
volatile unsigned int CTL
Control.
#define SPI_CTL_LSB
Least Significant Bit first (opposed to MSB)
#define E_SPI_TIMEOUT
SPI transmission timeout.
This driver wraps the functions of the OpenCores SPI master.
int spiASyncLength(SPI_Device *dev)
Last lenght of data transmitted.
#define SPI_CTL_MODE_3
SPI mode 3 (CPOL = 1, CHPA = 1) (See node)
#define SPI_MAX_SLAVE
Maximum number of slaves (0 - SPI_MAX_SLAVE - 1)
#define SPI_CTL_ASS
Auto slave select.
static uint32_t timeOutInit(uint32_t msec)
Initializes a timeout with the specified no of msecs.
#define SPI_CTL_MODE_2
SPI mode 2 (CPOL = 1, CHPA = 0) (See note)
bool spiASyncBusy(SPI_Device *dev)
Returns whether or not the SPI driver is busy tranceiving data.
#define SPI_CTL_MODE_MASK
SPI mode mask.
#define SPI_MAX_BYTES
The maximum bytes the SPI driver can transfer at a time.
uint32_t bitrate
Bit-rate.
static bool timeOut(uint32_t to)
Checks whether or not the timeout has expired.
Manages the global system error.
bool spiInit(SPI_Device *dev, SpiInit *init)
Initializes the specified SPI device with the specified parameters.
#define SPI_MAX_BITRATE
Maximum SPI bitrate.
#define SPI_CTL_MODE_0
SPI mode 0 (CPOL = 0, CHPA = 0)
void spiAsyncTx(SPI_Device *dev, uint8_t *dataIn, int length)
Start a asynchronous SPI transmission.
void spiDeselect(SPI_Device *dev)
Deselects all slaves.
volatile unsigned int DIVIDER
Divider.
This module is responsible for distributing error codes.
bool autoSlaveSelect
Auto slave select.
#define SPI_CTL_GO_BSY
Start Transfer / Busy.
bool spiTxRx(SPI_Device *dev, uint8_t *dataIn, uint8_t *dataOut, int len)
Transfers a specific number of bytes in a synchronous way.
bool errSet(uint32_t code, const char *error, const char *name)
Sets an error.
#define ERROR(CODE,...)
Expands an error code to an error code with a description (if ERROR_W_DESCR is declared).
#define SPI_CTL_IE
Interrupt enable.
volatile unsigned int SS
Slave Select.
#define _reg_t
Basic register type.
volatile unsigned int TRX[4]
Tx/Rx registers.
bool intEnable
Interrupts enabled (not implemented yet).
#define SPI_CTL_MODE_1
SPI mode 1 (CPOL = 0, CHPA = 1)