KM3NeT CLB  2.0
KM3NeT CLB v2 Embedded Software
 All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
dev_spi.h
Go to the documentation of this file.
1 /*
2  * KM3NeT CLB v2 Firmware
3  * ----------------------
4  *
5  * Copyright 2013 KM3NeT Collaboration
6  *
7  * All Rights Reserved.
8  *
9  *
10  * File : dev_spi.h
11  * Created : 8 mrt. 2013
12  * Author : Vincent van Beveren
13  */
14 
15 
16 #ifndef DEV_SPI_H_
17 #define DEV_SPI_H_
18 
19 /**
20  * @file
21  *
22  * @ingroup devices
23  *
24  * OpenCores SPI device.
25  *
26  * @attention that SPI modes 2 and 3 are not really supported in the strict sense. This could
27  * result in issues with devices that do require this mode.
28  */
29 
30 #include "dev_defs.h"
31 #include "util/macro.h"
32 
33 #define SDB_ID_SPI 0xDE04CA4D //!< SDB ID SPI device
34 
35 #define SPI_CTL_CHAR_LEN_MASK 0x7F ///< Number of bits to transfer in one go MASK
36 #define SPI_CTL_CHAR_LEN_SHIFT 0 ///< Number of bits to transfer in one go SHIFT
37 #define SPI_CTL_GO_BSY BIT( 8) ///< Start Transfer / Busy
38 #define SPI_CTL_RX_NEG BIT( 9) ///< If set latch on falling edge.
39 #define SPI_CTL_TX_NEG BIT(10) ///< If set changes on falling edge.
40 
41 #define SPI_CTL_MODE_MASK ( SPI_CTL_TX_NEG | SPI_CTL_RX_NEG) ///< SPI mode mask.
42 #define SPI_CTL_MODE_0 ( SPI_CTL_TX_NEG ) ///< SPI mode 0 (CPOL = 0, CHPA = 0)
43 #define SPI_CTL_MODE_1 ( SPI_CTL_RX_NEG ) ///< SPI mode 1 (CPOL = 0, CHPA = 1)
44 #define SPI_CTL_MODE_2 ( SPI_CTL_RX_NEG ) ///< SPI mode 2 (CPOL = 1, CHPA = 0) (See note)
45 #define SPI_CTL_MODE_3 ( SPI_CTL_TX_NEG ) ///< SPI mode 3 (CPOL = 1, CHPA = 1) (See node)
46 
47 #define SPI_CTL_LSB BIT(11) ///< Least Significant Bit first (opposed to MSB)
48 #define SPI_CTL_IE BIT(12) ///< Interrupt enable
49 #define SPI_CTL_ASS BIT(13) ///< Auto slave select
50 
51 #define SPI_DIV_MASK 0xFFFF
52 
53 
54 /**
55  * Structure defines OpenCores SPI Device.
56  */
57 typedef struct
58 {
59  reg_io TRX[4]; ///< Tx/Rx registers
60  reg_io CTL; ///< Control
61  reg_io DIVIDER; ///< Divider
62  reg_io SS; ///< Slave Select
63 } SPI_Device;
64 
65 
66 
67 #endif /* DEV_SPI_H_ */
68 
Structure defines OpenCores SPI Device.
Definition: dev_spi.h:57
volatile unsigned int CTL
Control.
Definition: dev_spi.h:60
volatile unsigned int DIVIDER
Divider.
Definition: dev_spi.h:61
#define reg_io
Input/Output register.
Definition: dev_defs.h:33
Provides common macros.
volatile unsigned int SS
Slave Select.
Definition: dev_spi.h:62
This module contains some very basic type definitions used for hardware mappings. ...