KM3NeT CLB
2.0
KM3NeT CLB v2 Embedded Software
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OpenCores SPI device. More...
Go to the source code of this file.
Data Structures | |
struct | SPI_Device |
Structure defines OpenCores SPI Device. More... | |
Macros | |
#define | SDB_ID_SPI 0xDE04CA4D |
SDB ID SPI device. | |
#define | SPI_CTL_CHAR_LEN_MASK 0x7F |
Number of bits to transfer in one go MASK. | |
#define | SPI_CTL_CHAR_LEN_SHIFT 0 |
Number of bits to transfer in one go SHIFT. | |
#define | SPI_CTL_GO_BSY BIT( 8) |
Start Transfer / Busy. | |
#define | SPI_CTL_RX_NEG BIT( 9) |
If set latch on falling edge. | |
#define | SPI_CTL_TX_NEG BIT(10) |
If set changes on falling edge. | |
#define | SPI_CTL_MODE_MASK ( SPI_CTL_TX_NEG | SPI_CTL_RX_NEG) |
SPI mode mask. | |
#define | SPI_CTL_MODE_0 ( SPI_CTL_TX_NEG ) |
SPI mode 0 (CPOL = 0, CHPA = 0) | |
#define | SPI_CTL_MODE_1 ( SPI_CTL_RX_NEG ) |
SPI mode 1 (CPOL = 0, CHPA = 1) | |
#define | SPI_CTL_MODE_2 ( SPI_CTL_RX_NEG ) |
SPI mode 2 (CPOL = 1, CHPA = 0) (See note) | |
#define | SPI_CTL_MODE_3 ( SPI_CTL_TX_NEG ) |
SPI mode 3 (CPOL = 1, CHPA = 1) (See node) | |
#define | SPI_CTL_LSB BIT(11) |
Least Significant Bit first (opposed to MSB) | |
#define | SPI_CTL_IE BIT(12) |
Interrupt enable. | |
#define | SPI_CTL_ASS BIT(13) |
Auto slave select. | |
#define | SPI_DIV_MASK 0xFFFF |
OpenCores SPI device.
Definition in file dev_spi.h.