KM3NeT CLB  2.0
KM3NeT CLB v2 Embedded Software
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cfg_board.h
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1 /*
2  * KM3NeT CLB v2 Firmware
3  * ----------------------
4  *
5  * Copyright 2013 KM3NeT Collaboration
6  *
7  * All Rights Reserved.
8  *
9  *
10  * File : cfg_ext_dev.h
11  * Created : 21 mrt. 2013
12  * Author : Vincent van Beveren
13  */
14 
15 
16 #ifndef CFG_BOARD_H_
17 #define CFG_BOARD_H_
18 
19 /**
20  * @file
21  *
22  * @ingroup cfg
23  *
24  * Configures the board-specific peripherals, like I2C, SPI etc...
25  */
26 
27 
28 /**
29  * @name I2C Device Addresses
30  *
31  * @{
32  */
33 #ifdef KC705
34 
35 /// I2C MUX for the KC705 board.
36 #define I2C_ADR_PCA9548 0x74
37 
38 #endif
39 
40 #define INS_I2C_DEV I2C3
41 
42 /// SHT21 I2C Address
43 #define SHT21_I2C_ADDR 0x40
44 
45 /// AHRS I2C Address
46 #define AHRS_I2C_SEC_ADDR 0x11
47 #define AHRS_I2C_PRIM_ADDR 0x21
48 
49 // XXX For now the address is determined dynamically and therefore a variable.
50 // Once all AHRS devices have the same I2C address it should be reverted to a
51 // macro. The actual definition is in app/subsys/sub_ins.c
52 #include <stdint.h>
53 extern uint8_t AHRS_I2C_ADDR;
54 
55 
56 /// LSM303D Address
57 #define LSM303D_I2C_ADDR 0x1D
58 
59 /// LSM303AGR Addresses (for reference, actually its not configurable)
60 #define LSM303AGR_ACC_I2C_ADDR 0x19 // 001 1001
61 #define LSM303AGR_MAF_I2C_ADDR 0x1E // 001 1110
62 
63 // =========================================================
64 // Power Board interface
65 // =========================================================
66 
67 /// Power board I2C device
68 #define POWER_I2C_DEV I2C3
69 
70 
71 /// The address of the Power Board ADC (LTC2499) - deprecated, no longer used
72 // #define POWER_ADC_I2C_ADDR 0x45
73 
74 // Address of the first MAX123x
75 #define POWER_ADC0_I2C_ADDR 0x35
76 
77 // address of the second MAX123x
78 #define POWER_ADC1_I2C_ADDR 0x31
79 
80 /// The address of the Power Board DAC (LTC2631)
81 #define POWER_DAC_I2C_ADDR 0x73
82 // #define POWER_DAC_I2C_ADDR 0x11
83 
84 // =========================================================
85 // Octopus Board interface
86 // =========================================================
87 
88 /// Octopus large I2C device
89 #define OCTOL_I2C_DEV I2C2
90 /// Octopus large CLPD base address
91 #define OCTOL_CPLD_I2C_ADDR 0x77
92 /// Octopus large PMT channel count
93 #define OCTOL_PMT_CH 19 //!< No of PMT channels
94 /// Octopus large I2C MUX base address
95 #define OCTOL_MUXB_I2C_ADDR 0x74
96 /// Position of the Piezo.
97 #define OCTOL_PIEZO 20
98 
99 /// Octopus small I2C device
100 #define OCTOS_I2C_DEV I2C1
101 /// Octopus small CLPD address
102 #define OCTOS_CPLD_I2C_ADDR 0x73
103 /// Octopus small PMT channel count
104 #define OCTOS_PMT_CH 12 //!< No of PMT channels
105 /// Octopus small I2C MUX base address
106 #define OCTOS_MUXB_I2C_ADDR 0x70
107 
108 /// Generic PROMiS I2C address
109 #define OCTO_PROMIS_I2C_ADDR 0x30
110 
111 // =========================================================
112 // SPI Flash
113 // =========================================================
114 
115 #define FLASH_SPI_DEV SPI
116 #define FLASH_SPI_CS 0
117 
118 
119 // =========================================================
120 // Uarts
121 // =========================================================
122 
123 #define CONSOLE_UART UART_DESCR_PTR(UART_ID1)
124 
125 #ifdef BASE
126 #define ACDC_UART UART_DESCR_PTR(UART_ID3)
127 
128 #ifdef FMC_V2
129 #define EDFA_UART UART_DESCR_PTR(UART_ID4)
130 #define BPS_UART UART_DESCR_PTR(UART_ID2)
131 #else
132 #define EDFA_UART UART_DESCR_PTR(UART_ID2)
133 #define BPS_UART UART_DESCR_PTR(UART_ID4)
134 #endif
135 #endif
136 
137 
138 /**
139  * @}
140  */
141 
142 #endif /* CFG_EXT_DEV_H_ */