KM3NeT CLB  2.0
KM3NeT CLB v2 Embedded Software
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dev_i2c.h
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1 /*
2  * KM3NeT CLB v2 Firmware
3  * ----------------------
4  *
5  * Copyright 2013 KM3NeT Collaboration
6  *
7  * All Rights Reserved.
8  *
9  *
10  * File : dev_i2c.h
11  * Created : 8 mrt. 2013
12  * Author : Vincent van Beveren
13  */
14 
15 
16 #ifndef DEV_I2C_H_
17 #define DEV_I2C_H_
18 
19 /**
20  * @file
21  *
22  * @ingroup devices
23  *
24  * This provides a device mapping for the OpenCores I2C peripheral.
25  *
26  */
27 
28 #include "dev_defs.h"
29 
30 #define SDB_ID_I2C 0x6B9456E4 //!< SDB ID I2C
31 
32 #define I2C_CMD_IACK BIT(0) ///< I2C ACK interrupt
33 #define I2C_CMD_ACK BIT(3) ///< Though bit is named ACK, its really NACK when set to 1
34 #define I2C_CMD_WR BIT(4) ///< Write command
35 #define I2C_CMD_RD BIT(5) ///< Read command
36 #define I2C_CMD_STOP BIT(6) ///< Issue stop
37 #define I2C_CMD_START BIT(7) ///< Issue start
38 
39 #define I2C_STS_IRQ BIT(0) ///< IRQ raised
40 #define I2C_STS_TIP BIT(1) ///< Transfer in progress
41 #define I2C_STS_ARBLOST BIT(5) ///< Arbitration lost
42 #define I2C_STS_BUSY BIT(6) ///< Is busy
43 #define I2C_STS_RXACK BIT(7) ///< Not Acknowledge receive
44 
45 #define I2C_CTL_INT_ENA BIT(6) ///< Enable interrupts.
46 #define I2C_CTL_CORE_ENA BIT(7) ///< Enable core.
47 
48 #define I2C_IF_NO_MASK 0x0F ///< Interface number mask
49 #define I2C_IF_NO_SHIFT 0 ///< Interface no shift.
50 #define I2C_IF_BUSY BIT(7) ///< Busy bit (software programmable)
51 
52 /**
53  * Structure defines OpenCores I2C Device.
54  */
55 typedef struct
56 {
57  reg_io PRE_LO; ///< Prescaler low
58  reg_io PRE_HI; ///< Prescaler high
59  reg_io CTL; ///< Control
60  reg_io TXRX; ///< Transmit / Receive
61  reg_io CMDSTS; ///< Command and Status.
62  reg_io IF; ///< Interface no. register (WR extension)
63 } I2C_Device;
64 
65 
66 #endif /* DEV_I2C_H_ */
volatile unsigned int PRE_HI
Prescaler high.
Definition: dev_i2c.h:58
volatile unsigned int PRE_LO
Prescaler low.
Definition: dev_i2c.h:57
volatile unsigned int CTL
Control.
Definition: dev_i2c.h:59
volatile unsigned int IF
Interface no. register (WR extension)
Definition: dev_i2c.h:62
Structure defines OpenCores I2C Device.
Definition: dev_i2c.h:55
volatile unsigned int TXRX
Transmit / Receive.
Definition: dev_i2c.h:60
volatile unsigned int CMDSTS
Command and Status.
Definition: dev_i2c.h:61
#define reg_io
Input/Output register.
Definition: dev_defs.h:33
This module contains some very basic type definitions used for hardware mappings. ...